1. Field of the Disclosure
This disclosure relates generally to semiconductor devices, and more specifically, to methods of forming a semiconductor device featuring a gate stressor and semiconductor device.
2. Related Art
Current NMOS process-induced stressors such as tensile etch stop layer (ESL) or embedded silicon carbon (eSiC) are either (i) relatively weak and not scalable to small pitches or else (ii) not easily manufacturable. In addition, the current NMOS process-inducted stressors do not induce significant stress in longer channel devices, for example, non-volatile memory (NVM), power, or analog devices.
Accordingly, there is a need for an improved method and apparatus for overcoming the problems in the art as discussed above.